Welding inverter and method for controlling a welding inverter

ABSTRACT

The present invention concerns a half-bridge inverter and a method for controlling such a welding inverter which has a nominal output power P n  and a nominal operating angular frequency ω t , the inverter being comprised of a DC power source (E); of a capacitor configuration comprising at least one capacitor (C n ), the circuit being connected at its first end to one end of the DC power source (E) and at its other end to a point A; of two switching elements (T 1 , T 2 ) connected in series over the DC power supply (E), the switching elements being capable of controlling the pulse width τ of the current to the welding load, and thus the power to the welding load, whereby τ max  determines the nominal power output of the inverter; and of a transformer primary (L p ) connected at its first end to point A and at its second end to the center point of the switching elements (T 1 , T 2 ), and the current switched through the primary has a peak value I i . At output power levels which exceed the critical output power P k , the total capacitance ΣC of the capacitor circuit (C n ) is smaller than the product of the current I i  and the pulse width τ divided by the voltage E of the DC power source (ΣC&lt;(I i  ×τ)/E), and the resonant angular frequency ω r  (=1/√L p  τC) determined by the total inductance L p  of the transformer primary and the total capacitance of the capacitor configuration (C n ) is essentially lower than the operating angular frequency ω t  of the inverter.

FIELD OF THE INVENTION

The present invention relates to a welding inverter.

As well as a method for controlling a welding inverter.

BACKGROUND OF THE INVENTION

In a conventional pulse-width modulated inverter, the center-tappingcapacitors C_(n) are dimensioned for a sufficiently large capacitancethat permits only an insignificant voltage ripple of the center point Aof the tapping circuit at the operating frequency of the inverter. Themain transformer is dimensioned for maximum inductance of L_(p), wherebyits magnetization current remains small.

On the other hand, a conventional resonant inverter has the values of Cand L_(p) dimensioned so that the circuit sustains a large-amplituderesonance oscillation, whereby the peak-to-peak voltage at thecenter-tapping point A exceeds the voltage of the DC feed circuit.

Circuit configurations related to welding inverter techniques aredescribed in, i.a., the following publications:

The U.S. Pat. No. 4,533,986 concerns a power supply for signalprocessing applications. The power supplies described are of the seriesresonant type.

The U.S. Pat. No. 4,679,129 describes an inverter configuration whichuses series resonant power supplies.

The SE patent publication 386,330 describes an AC power sourceparticularly for induction heating. The operating frequency of the powergenerator is determined by an external oscillator. The capacitors C5 andC6 of the circuit are dimensioned for resonance close to the operatingfrequency with the coil 7 acting as the load. The frequency of theoscillator 2 is adjustable to control the input power to the coil 7. TheLC circuit is dimensioned to be approximately resonant at the operatingfrequency.

A crucial drawback of prior-art pulse-width modulated circuits has beenassociated with the cut-off behaviour of the switching elements at highcurrent levels. If a transistor is used as the switching element, thematter is relatively insignificant at low current levels. However, theshort-circuit currents occurring in welding at levels up to twice thenominal current pose problems during the cut-off phase in all invertertypes.

SUMMARY OF THE INVENTION

It is an object of the present invention to overcome the drawbacks ofthe above described techniques and to achieve a novel type of weldinginverter and a method for controlling said inverter.

The invention is based on the concept of dimensioning the totalcapacitance ΣC, which may comprise a single capacitor or severalparallel-acting capacitors C₁, C₂ . . . , in a half-bridge inverter sothat at power levels exceeding a critical power level P_(k) the chargingequation fulfills particularly for a square wave the followingcriterion:

    I.sub.i ×τ>ΣC×E, where

I_(i) =peak value of current (typically square wave) passing through theprimary of the transformer L_(p), said peak value being dependent on theloading level,

τ="on" state duration of half cycle (that, is pulse width) of currentI_(i),

E=total voltage (source voltage) over capacitors, and

P_(n) =inverter nominal output power, E×I_(n) /2

P_(k) =critical output power, 0<P_(k) <P_(n), typically P_(k) is about15 . . . 80% of P_(n).

In addition, the resonant angular frequency of the inverter circuitaccording to the invention, which is determined by the components L_(p)and ΣC, is significantly lower than the operating frequency of theinverter.

If a full-bridge inverter is used, its dimensioning can always bereturned to that of a half-bridge inverter. Therefore, the presentinvention also covers full-bridge inverters by virtue of thiscomputational possibility.

To elucidate the function of the invention, the following variables aredefined:

I_(n) =nominal value of inverter primary current;

ω_(t) =nominal angular operating frequency, and (ω_(t) =π/τ_(max))

τ_(max) =pulse width corresponding to the inverter nominal output power.

More specifically, the welding inverter and method of using the weldinginverter according to the invention is characterized in that a criticaloutput power P_(k), which is smaller than the nominal output powerP_(n), is defined for the inverter. Moreover, for those output powerlevels of the inverter which exceed the critical output power P_(k), thecapacitor circuit (C_(n)) is dimensioned to fulfill the followingcriterion:

the total capacitance ΣC of the capacitor circuit (C_(n)) is smallerthan the product of the current I_(i) and the pulse width τ divided bythe voltage E of the DC power source (ΣC<(I_(i) ×τ)/E).

In addition, the resonant angular frequency ω_(t) (=1/√L_(p) ΣC)determined by the total inductance L_(p) of the transformer primary andthe total capacitance ΣC of the capacitor circuit (C_(n)) is dimensionedto be essentially lower than the operating angular frequency ω_(t) ofthe inverter.

Also, at power levels above the critical output power P_(k), theoperating angular frequency ω_(t) is increased to increase the outputpower of the inverter.

The invention provides outstanding benefits.

The concept according to the invention brings an essential improvementto the handling of current cut-off conditions at high welding currentlevels. Therefore, the switching components which perform the cut-offcan be dimensioned for significantly smaller cut-off currents than it ispossible when using conventional techniques.

BRIEF DESCRIPTION OF THE DRAWINGS

The invention is next examined in greater detail with the help ofexemplifying embodiments illustrated in the attached drawings, in which

FIG. 1 shows diagrammatically the circuit configuration for a weldinginverter according to the invention.

FIG. 2a shows in a graph the voltage-time relationship for the voltageover the center-tapping capacitor C at low welding current levels in awelding inverter according to the invention.

FIG. 2b shows in a graph the current-time relationship for thetransformer primary current at low welding current levels in a weldinginverter according to the invention.

FIG. 3a shows in a graph the voltage-time relationship for the voltageover the center-tapping capacitor C at high welding current levels in awelding inverter according to the invention.

FIG. 3b shows in a graph the current-time relationship for thetransformer primary current at high welding current levels in a weldinginverter according to the invention.

FIG. 4a shows diagrammatically the circuit configuration for anotherembodiment of the welding inverter according to the invention.

FIG. 4b shows diagrammatically the circuit configuration for a thirdembodiment of the welding inverter according to the invention.

FIG. 5 shows diagrammatically the circuit configuration for a fourthembodiment of the welding inverter according to the invention.

FIG. 6 shows in a graph the control method for the welding inverteraccording to the invention.

FIG. 7 shows a circuit configuration which is electrically andfunctionally equivalent to that illustrated in FIG. 1.

FIG. 8 shows the combination of two circuits according to the inventioninto a full-bridge circuit.

FIG. 9 shows a circuit configuration which is electrically andfunctionally equivalent to that illustrated in FIG. 8.

FIG. 10 shows in a graph the current-time relationship for thetransformer primary current at a partial load level in a weldinginverter according to the invention.

DETAILED DESCRIPTION

The nominal output power P_(n) of the welding inverter is definedaccording to the output power capability needed in practical work, andconsequently the nominal output power is chosen approximately equal tothe maximum output power capability. For reasons related to heattransfer, the inverter cannot in general, however, deliver the fullnominal output power, but rather, the duty ratio (allowed working timedivided by total operating time) in practice varies in the range of 30 .. . 60%.

Respectively, the primary current I_(i) of the inverter varies in therange 2 . . . 150% of the nominal primary current I_(n), depending onthe instantaneous output power need and pulse ratio employed.

The welding inverter according to the invention, which is illustrated inFIG. 1, operates at a nominal angular frequency designated with ω_(t).The inverter comprises a DC power source E which has connected over it acenter-tapping configuration comprised of at least two capacitors C₁,C₂, whereby a center point A in the center-tapping circuit can bedefined, since the capacitances of the Center-tapping components C₁, C₂connected to both sides of the center point A are approximately equal.Over the DC power source are further connected two switching elementsT₁, T₂ in series, whose function is to control the primary current pulsewidth τ, and thus the output power, whereby τ_(max) determines thenominal output power available from the inverter. Between the centerpoint of the center-tapping circuit C₁, C₂ and the center point of theswitching elements T₁, T₂ is connected a primary L_(p) of a transformer,in which the peak value of the primary current is designated with I_(i).According to the invention the total capacitance ΣC of thecenter-tapping components C₁, C₂ fulfills at power levels above thecritical output power P_(k) the following criterion;

    ΣC<(I.sub.i ×τ)/E.

The magnitude of the critical output power P_(k) varies according to theapplication, however, so that the critical output power is fixed for acertain equipment size. If the inverter operates at a constantfrequency, the critical output power P_(k) is only slightly, by approx.10 . . . 20%, smaller than the nominal output power P_(n). Inapplications operating at a variable frequency the value of P_(k) isdimensioned considerably smaller, typically by approx. 40 . . . 60%smaller than the nominal output power P_(n).

The total capacitance ΣC is advantageously smaller by at least 20% thanthe ratio in the equation above. Furthermore, the resonant angularfrequency ω_(r) (=1/√L_(p) ΣC) determined by the total inductance L_(p)of the transformer primary and the total capacitance ΣC of the centertapping circuit C₁, C₂ is essentially lower than the operating angularfrequency ω_(t) of the inverter, being e.g. lower than 1/5 of inverteroperating angular frequency ω_(t). Reverse-biased diodes D₁ and D₂ areadditionally connected in parallel with the switching elements T₁ andT₂. The diodes are not absolutely essential for the function of thecircuit according to the invention. Due to the nonideal behaviour of thetransistors, however, the diodes are employed. In some transistor typesthe diodes are integral with the transistor chip itself. Strictlydefined, the total capacitance ΣC is the total capacitance connected tothe point A, whereby the capacitors C₁ and C₂ act functionally inparallel. The transformer secondary is wound center-tapped, whereby oneload terminal is connected to the center tap of the secondary. The otherterminal of the load is connected to the outer ends of the secondary viadiodes D₅ and D₆ as shown in the diagram, whereby the load is fed with afull-wave rectified voltage that further is filtered with the help of asmoothing inductor L₅.

As illustrated in FIGS. 2 and 3, the function of the inverter circuitaccording tot he invention is as follows:

At low power levels, the circuit operates in the conventional manner,and the voltage at the point A does not fluctuate essentially. When thecurrent I_(i) is increased, the voltage over the capacitors C_(n) beginsto fluctuate with a greater amplitude as shown in FIG. 2a.Correspondingly, the current I_(i) varies as shown in FIG. 2b. With afurther increase in the current I_(i), a situation illustrated in FIG.3b is finally attained in which the peak values of the voltage U_(C)exceed the power source voltage E (FIG. 3a). When U_(C) exceeds thepower source voltage in the manner shown in FIG. 3a, the value of thecurrent I_(i) starts falling in the manner shown in FIG. 3b just priorto the cut-off instant t_(k). Consequently, at the cut-off instantt_(k), the current through the transistor T_(n) is essentially smallerthan the peak value of the current. In addition to this, the current viathe stray inductance of the transformer falls very rapidly, because thevoltage over the transformer primary may even be reversed at the cut-offinstant. By virtue of the resonance principle, the cut-off situationover the switching elements is noncritical. Thus, the switching elementsthemselves do not need auxiliary circuits to augment the cut-offprocess. In practice, always when the current I_(i) in the caseillustrated in FIG. 3b approaches the zero-crossing point, a dead timeoccurs during which the current I_(i) is zero or at least very close tozero. If this time would be depicted in the diagram illustrated in FIG.3b, the dead time would appear as a short threshold period ofessentially zero current, drawn parallel to the t-axis, adjacent tot_(k). The duration of the dead time for full pulse duty cycle isapprox. 0.5 . . . 3 μs.

The values of components and nominal design parameters for anexemplifying case could be as follows:

    ______________________________________                                                               Exemplifying                                                  Design range    value                                                  ______________________________________                                        ΣC =                                                                             0.1 . . . 10 μF                                                                              1 μF                                            L.sub.p =                                                                              0.5 . . . 20 mH   2 mH                                               I.sub.i =                                                                              0 . . . 200 A     35 A                                               E =      200 . . . 900 V   500 V                                              ω.sub.t =                                                                        3 × 10.sup.4 . . . 6 × 10.sup.5 l/s                                                 10.sup.5 l/s                                       τ =  5 . . . 200 μs 25 μs                                           I.sub.n =                                                                              5 . . . 100 A     40 A                                               τ.sub.max =                                                                        π/ω.sub.t                                                                              31 μs                                           P.sub.n =                                                                              500 W . . . 50 kW 8 kW                                               P.sub.k =                                                                              (15 . . . 80%) × P.sub.n                                                                  50% × P.sub.n                                ______________________________________                                    

When the current illustrated in the graph of FIG. 3 reaches a state inwhich I_(i) is at the cut-off instant only a small fraction (e.g. 10 . .. 30%) of the peak current during the operating cycle, the output powerfrom the circuit starts to droop at increased load. This drawback can beavoided by increasing the operating frequency so that the output poweris boosted at increased load, yet maintaining the condition that thecut-off takes place at an essentially low current. Advantageously, theincrease in operating frequency is accomplished when the inverter outputpower has already marginally exceeded the critical output power levelP_(k). Thereby, the design criterion based on the charging equationachieves an advantageous cut-off over a wide range of output power. Thisarrangement approaches the resonant cut-off scheme, and in someoccasion, it is even advantageous to overgo to purely resonant cut-offin which the current passes most of the time via the diodes D₁ and D₂ asis the case in a conventional resonance-type inverter, whereby nocut-off losses occur in the power switch element.

The concept of frequency change can be utilized in the dimensioning ofthe circuit, e.g., as follows:

The following design rules are assumed:

Charging equation:

    C×E=τ×I.sub.i

In practical design based on nonideal components it has been found thatthe dimensioning rule for the capacitor C can be formulated as: ##EQU1##where k=0.7 . . . 0.8

This method of dimensioning achieves the goal that extremely low cut-offlosses be attained close to the critical output power level P_(k). Ifthe critical output power P_(k) has been chosen high, actually close tothe nominal output power P_(n), an advantageous cut-off situation isachieved only at high values of τ, which means high load voltages atcurrent levels close to the nominal output current and above. Becausethe output voltage is proportional to the relative pulse width, that is,the ratio τ/T, a rather disadvantageous cut-off situation results at lowload voltages. This drawback can be diminished by changing the operatingfrequency in the following manner:

Solving the equation of limit criteria for the current I_(i) yields theequation: ##EQU2## As is evident, the advantageous maximum current inpractical design depends on the source voltage E, capacitor C andinstantaneous pulse width. The design parameters C and E are difficultto alter after the equipment is built, because the output voltage to theload depends on the value of E as follows: ##EQU3## where n=transformerturns ratio

Obviously, the nominal primary current of the inverter power supply canbe increased by reducing the pulse length τ. In order to maintain theoutput voltage at a constant level, the operating frequency must beincreased proportionally.

Thus, the practical rules of dimensioning can be described as follows:

The smallest operating angular frequency of the apparatus is selected asan angular frequency which yet fulfills other design criteria (e.g.sound level, current ripple). The critical output power P_(k) is set ashalf the desired nominal output power. This approach gives an extremelyadvantageous cut-off situation when the apparatus is loaded atapproximately half the nominal output current. If the apparatus is todeliver a higher output current than half of said nominal current, theoperating frequency is increased correspondingly so that the desiredoutput power is supplied yet retaining the advantageous cut-offsituation, because the circuit operates above the critical output powerP_(k).

FIGS. 4a and 4b illustrate alternative configurations of the circuitaccording to the invention that are equivalent to the circuit shown inFIG. 1 except with the omission of the second capacitor. If one of thecapacitors is omitted, the capacitance of the remaining capacitor C_(n)must be equal to the sum of capacitances C₁ and C₂.

The embodiment shown in FIG. 5 is an enhanced version of the circuitillustrated in FIG. 1. The circuit is provided saturable inductorsL_(k1) and L_(k2) placed between the input B of the transformer primaryL_(p) and the center point C adjoining the turn-off controllableswitching elements, transistors T₁ and T₂ in particular, as well asbetween the point B and the center point F adjoining the diodes D₃ andD₄, whereby the inductors are advantageously dimensioned so that theduration of saturation in the inductor placed between the points B and Csubstantially exceeds the duration of saturation in the saturableinductor placed between the points B and F. As necessary, an RC snubbercircuit is connected in parallel with each diode D₁, D₂, D₃, D₄.

In the circuit configuration illustrated in FIG. 5, the resonanceprinciple utilized causes at high power levels a situation in which thecurrent passing via the freewheeling diode D₁ must be transferred to thetransistor T₂, and correspondingly, the current passing via D₂ to thetransistor T₁.

Even if a fast-switching diode, the reverse current transient via thediode stresses both the diode itself and the transistor overtaking thediode current in the cut-off situation, whereby the transistor has tofunction outside the limits of safe operation. This drawback iscircumvented by way of the saturable inductors L_(k1) and L_(k2) of thecircuit shown in FIG. 5. If the duration of saturation in L_(k1) isdimensioned to be substantially longer than that of L_(k2), the returncurrent of the resonant voltage swing does not pass in any appreciableamount via said transistor branch, but rather, via L_(k2) to the diodesD₃ and D₄. Now, if one of the transistors is driven conductive beforethe current in the diode branch has fallen to zero, L_(k1) acts as anauxiliary commutation circuit for the transistor switch and L_(k2)limits the rate of change dI/dt in the commutation of the diode branchto a safe value. If the diode branch is additionally provided with amoderate RC snubber circuit, the cut-off losses in the diode branchremain extremely low.

When operating the inverter as shown in FIG. 6 with load currents I_(L)which remain approximately smaller than half the nominal load current ofthe inverter and the load voltage is anywhere between zero and themaximum output voltage of the inverter, the operation takes place at theminimum operating frequency defined by the inverter design. When theload current reaches approximately half the nominal output current andthe load voltage is at the nominal level, the cut-off current via theswitching element starts to decrease. If the load is increased in thissituation and the frequency would be held constant, the output voltagewould drop. Therefore, with an increasing load, the operating frequencyis increased in the case the output voltage is to be held constant. Bycontrast, if the output voltage requirement presumed by the loadingsituation is met without frequency increase, the driver circuitryoperates at constant frequency, so the frequency change is based ondemand only.

According to FIG. 7, the circuit configuration shown in FIG. 1 can bedrawn so that the summed capacitance of the capacitors C₁ and C₂ isplaced between the transformer primary L_(p) and the center point formedby the split power source E/2. This circuit configuration iselectrically and functionally equivalent to that illustrated in FIG. 1.Both circuit configurations shown in FIGS. 1 and 7 are known in the artas half-bridge inverters.

According to FIG. 8, a full-bridge inverter is formed by parallellingtwo half-bridge inverters shown in FIG. 7. Such a circuit configurationis rare but well illustrative of the design method in which afull-bridge inverter is formed from half-bridge inverters.

FIG. 9 shows the circuit configuration of a practical full-bridgeinverter in which the components T₃, T₄, D₆ and D₇ in the left-sidebranch to their specifications correspond to the components of theright-side branch. The circuit configuration illustrated in FIG. 8 ishere reduced to a simplified form by combining the capacitors C into asingle capacitor C/2 and the power sources E/2 into a single powersource E. The output power capability of such an inverter is double thatof a single half-bridge inverted implemented using same component andvoltage values. Therefore, in order to determine the proper form of thedesign criterion according to the invention, the full-bridge invertermust either be divided into two half-bridge inverters both of whichdesigned for half the desired output power capability, or alternatively,the charging equation of the full-bridge inverter must be written as:

    2×E×ΣC=I×τ

Obviously, such a full-bridge inverter can be any time reduced back to acircuit configuration comprising two half-bridge inverter circuitsillustrated in either FIG. 1 or 7, whereby the design criterionaccording to the invention is easy to determine.

As illustrated in FIG. 10, partial loads are handled using a small pulseduty ratio τ/T, whereby the dead time between the pulses becomesrelatively long.

What is claimed is:
 1. A half-bridge inverter or a circuit configurationmodelled as a half-bridge inverter from a full-bridge inverter bycomputational halving methods, said inverter having a nominal outputpower P_(n) and a nominal operating angular frequency ω_(t), saidinverter comprisinga DC power source (E), two switching elements (T₁,T₂) connected in series over said DC power source (E), said switchingelements being capable of controlling the pulse width τ of the currentto a welding load, and thus the power to the welding load, wherebyτ_(max) determines the nominal power output of the inverter, atransformer primary (L_(p)) connected at a first end to the center pointof said switching elements (T₁, T₂), whereby the current switchedthrough said primary has a peak value I_(i) with a waveform whichtypically is a square wave, a capacitor circuit comprised of at leastone capacitor (C_(n)), said circuit being connected at a first end to anend of the transformer primary (L_(p)) which is not connected to saidswitching elements (T₁, T₂) and further being connected at a second enddirectly to one end of said DC power source (E), and reverse-biaseddiodes (D1, D2) are connected in parallel with said switching elements(T₁, T₂), characterized in that said inverter designed for a criticaloutput power P_(k), which is smaller than the nominal output powerP_(n), for those output power levels of the inverter which exceed saidcritical output power P_(k), the capacitor circuit (C_(n)) fulfills thefollowing design criterion:the total capacitance ΣC of the capacitorcircuit (C_(n)) is smaller than the product of the current I_(i) and thepulse width τ divided by the voltage E of the DC power source (ΣC<(I_(i)×τ)/E×N), and the resonant angular frequency ω_(r) (=1/√L_(p) ΣC)determined by the total inductance L.sub. of the transformer primary andthe total capacitance ΣC of the capacitor circuit (C_(n)) is essentiallylower than the operating angular frequency ω_(t) of the inverter.
 2. Ahalf-bridge inverter as defined in claim 1, said inverter having anominal output power P_(n) and a nominal operating angular frequencyω_(t), said inverter comprisinga DC power source (E), a capacitorcircuit comprised of at least one capacitor (C_(n)), said circuit beingconnected at a first end to one end of said DC power source (E) and at asecond end to a point A, and two switching elements (T₁, T₂) connectedin series over said DC power supply (E), said switching elements beingcapable of controlling the pulse width τ of the current to the weldingload, and thus the power to the welding load, whereby τ_(max) determinesthe nominal power output of the inverter, reverse-biased diodes (D₁, D₂)connected in parallel with said switching elements (T₁, T₂) , and atransformer primary (L_(p)) connected at a first end to said point A andat a second end to the center point of said switching through saidprimary has a peak value I_(i) with a waveform which typically is asquare wave, characterized in that said capacitor circuit is comprisedof a center-tapping configuration comprising at least two capacitors(C₁, C₂), said configuration being connected over said DC power source(E), whereby a center point (A) can be defined in the center-tappingcircuit as the capacitances of the center-tapping components (C₁, C₂)connected to both sides of said center point are approximately equal. 3.A half-bridge inverter as defined in claim 1, characterized in that saidcritical output power P_(k) is 15 . . . 80% of said nominal output powerP_(n).
 4. A half-bridge inverter as defined in claim 1, characterized inthat the resonant angular frequency ω_(r) (=1/√L_(p) ΣC) determined bythe total inductance L_(p) of the transformer primary and the totalcapacitance ΣC of the center-tapping configuration (C₁, C₂) is lowerthan 1/5 of the operating angular frequency ω_(t) of the inverter.
 5. Ahalf-bridge inverter as defined in claim 1, characterized in that saidinverter has means for increasing the operating angular frequency, andthus the available output power, when the power to the load exceeds acritical output power P_(k), whereby the cut-off of said switchingelements (T₁ T₂) occurs at low current.
 6. A method for controlling suchas inverter which has a nominal output power P_(n) and a nominaloperating angular frequency ω_(t), said inverter being comprised of a DCpower source (E); of a capacitor circuit comprising at least onecapacitor (C_(n)), said circuit being connected at a first end to oneend of said DC power source (E) and at a second end to a point A; of twoswitching elements (T₁, T₂) connected in series over said DC powersupply (E), said switching elements being capable of controlling thepulse width τ of the current to a welding load, and thus the power tothe welding load, whereby τ_(max) determines the nominal power output ofthe inverter; of reverse-biased diodes (D₁, D₂) connected in parallelwith said switching elements (T₁, T₂); and of a transformer primary(L_(p)) connected at a first end to said point A and at a second end tothe center point of said switching elements (T₁, T₂), whereby thecurrent switched through said primary has a peak value I_(i),in whichmethod the pulse width τ and the operating angular frequency ω_(t) arevaried in order to control the welding power, characterized in that acritical power output P_(k) which is smaller than the nominal outputpower P_(n) is defined for said inverter, for those output power levelsof the inverter which exceed said critical output power P_(k), thecapacitor circuit (C_(n)) is dimensioned to fulfill the followingcriterion:the total capacitance ΣC of the capacitor circuit (C_(n)) issmaller than the product of the current I_(i) and the pulse width τdivided by the voltage E of the DC power source (ΣC<(I_(i) ×τ)/E), theresonant angular frequency ω_(r) (=1/√L_(p) ΣC) determined by the totalinductance Lp of the transformer primary and the total capacitance ΣC ofthe capacitor circuit (C_(n)) are dimensioned to be essentially lowerthan the operating angular frequency ω_(t) of the inverter, and at powerlevels above said critical output power P_(k) said operating angularfrequency ω_(t) is increased to increase the output power of theinverter.
 7. A method as defined in claim 6, characterized in that saidcritical output power P_(k) is defined as half the nominal output powerP_(n) of the inverter.
 8. A half-bridge inverter as defined in claim 2,characterized in that said critical output power P_(k) is 15 to 80% ofsaid normal output power P_(n).
 9. A half-bridge inverter as defined inclaim 8 characterized in that said critical output power P_(k) is 50% ofsaid normal output power P_(n).
 10. A half-bridge inverter as defined inclaim 3, characterized in that said critical output power P_(k) is 50%of said normal output power P_(n).